Join the leading chiplet startup! As an Eliyan Digital Verification Engineer, you will be working at a fast paced early stage startup creating technologies that fuel tomorrow’s chiplet based systems with best-in-class power, area, manufacturability, and design flexibility. You will be responsible for ensuring the correctness of new grounds up silicon designs. You will work with a cross-functional team of industry experts that operate from first principles, innovate and push the envelope to create high-volume and high-performance manufacturable products. We offer a fun work environment with excellent benefits.

● Verification of Analog Mixed Signal designs

● Defining and executing test plans for new designs

● Authoring test benches, for digital and mixed-signal circuits

● Creating assertions and checkers, stimulus, and coverage metrics

● Establishing coverage metrics and improving coverage

● Work with RTL and Analog designers to understand the design and how to exercise it.

● Expertise in UVM and SystemVerilog

● Experience with test plan development and execution

● Experience with assertions, system-level tests, and full-chip testing

● Knowledge of C++ and scripting languages

● BS EE or equivalent, with 5 years of experience

● Knowledge of UPF and power-aware design a plus

● Previous tapeout of design where mixed signal verification was a key focus

● Understanding of analog/mixed-signal blocks such as PLLs, DLLs, ADCs/DACs, Serdes, LDOs

● Experience with Verilog real number modeling (RNM) or Verilog AMS modeling

● MS/PhD EE or equivalent, with 7 years of experience