Principal Design Verification Engineer - IO Subsystem
SambaNova Systems
This job is no longer accepting applications
See open jobs at SambaNova Systems.See open jobs similar to "Principal Design Verification Engineer - IO Subsystem" Celesta.The era of pervasive AI has arrived. In this era, organizations will use generative AI to unlock hidden value in their data, accelerate processes, reduce costs, drive efficiency and innovation to fundamentally transform their businesses and operations at scale.
SambaNova Suite™ is the first full-stack, generative AI platform, from chip to model, optimized for enterprise and government organizations. Powered by the intelligent SN40L chip, the SambaNova Suite is a fully integrated platform, delivered on-premises or in the cloud, combined with state-of-the-art open-source models that can be easily and securely fine-tuned using customer data for greater accuracy. Once adapted with customer data, customers retain model ownership in perpetuity, so they can turn generative AI into one of their most valuable assets.
Working at SambaNova
This role presents a unique opportunity to shape the future of AI and the value it can unlock across every aspect of an organization’s business and operations. We are looking for talented and motivated engineers to help us solve some of the most challenging problems in machine learning, artificial intelligence, and data analytics. As a Principal Design Verification Engineer - IO Subsystem, you'll be responsible for verifying the design, architecture, and micro-architecture using advanced verification methodologies.
Responsibilities
- Develop and maintain IO subsystem test-bench components, test cases, and scripts for design verification at the block, full chip, system, and gate-level benches
- Develop test plan, schedule, and methodology for functional, performance, and post-silicon verification
- Participate in mapping and coding ML and AL application flows for verification and compiler development
- Participate in design verification reviews, maintain regressions, and drive failure root-cause
- Collaborate with design, architecture, and software teams to innovate and solve problems
- Enhance DV methodologies and processes to improve execution effectiveness and efficiency
- Mentor/lead junior engineers
Basic Qualifications
- MS or BS degree in EE, CS or CE
- 7+ years of industry experience in ASIC design verification
Additional Required Qualifications
- Experience verifying digital logic for CPU, GPU, SoC, and ASICs with High-Speed I/O interfaces such as PCIE or CXL
- Hands-on experience in standard verification methodologies such as VMM, OVM, or UVM
- Strong in coding with System Verilog, SVA, Python, and C/C++
- Strong debugging, analytical, and communication skills
- Strong collaborator as we believe in no boundaries and collaboration across the entire organization with access to all levels and departments
- Proven track record of successful full-cycle DV development from planning to product of an ASIC chip or a complex subsystem
- Knowledge of machine learning architecture and/or computer architecture
- Experience with machine learning and artificial intelligence applications
- Strong understanding of one or more of the following domains: computation / interconnect / memory systems
- Team leadership experience
- Experience in prototyping / silicon bring-up
Annual Salary Range and Level
The base salary for this position ranges from $165,000/year up to $180,000/year. This range is based on role, level, and location and reflects the salary target for new hires in the US. Individual pay within the range will depend on a number of factors, including a candidate’s job-related qualifications, skills, competencies and experience, and location.
Benefits Summary
SambaNova offers a competitive total rewards package, including the base salary, plus equity and benefits. We cover 95% premium coverage for employee medical insurance, and 80% premium coverage for dependents and offer a Health Savings Account (HSA) with employer contribution. We also offer Dental, Vision, Short/Long term Disability, Basic Life, Voluntary Life and AD&D insurance plans in addition to Flexible Spending Account(FSA) options like Health Care, Limited Purpose, and Dependent Care. Our library of well-being benefits includes a full subscription to Headspace, access to One Medical, counseling services with an Employee Assistance Program, and much more.
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Submission Guidelines
Please note that in order to be considered an applicant for any position at SambaNova Systems, you must submit an application form for each position for which you believe you are qualified.
If you are a new, recent (within the last two years), or upcoming college graduate and are interested in opportunities with SambaNova Systems, please apply through our university job listings.
EEO Policy
SambaNova Systems is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard basis of age (40 and over), color, disability, gender identity, genetic information, marital status, military or veteran status, national origin/ancestry, race, religion, creed, sex (including pregnancy, childbirth, breastfeeding), sexual orientation, and any other applicable status protected by federal, state, or local laws.
Customers turn to SambaNova to quickly deploy state-of-the-art generative AI capabilities within the enterprise. Our purpose-built enterprise-scale AI platform is the technology backbone for the next generation of AI computing.
Headquartered in Palo Alto, California, SambaNova Systems was founded in 2017 by industry luminaries, and hardware and software design experts from Sun/Oracle and Stanford University. Investors include SoftBank Vision Fund 2, funds and accounts managed by BlackRock, Intel Capital, GV, Walden International, Temasek, GIC, Redline Capital, Atlantic Bridge Ventures, Celesta, and several others. Visit us at sambanova.ai. Follow SambaNova Systems on Linkedin.
This job is no longer accepting applications
See open jobs at SambaNova Systems.See open jobs similar to "Principal Design Verification Engineer - IO Subsystem" Celesta.