About Tagore Tech:

Tagore Tech is pioneering a new semiconductor process that enables high RF power at competitive price points. We are a fabless semiconductor company with design centers in Arlington Heights, Illinois. Our R&D team is dedicated to developing disruptive solutions leveraging wide bandgap technologies that address RF design challenges and accelerate time- to-market for a wide range of applications, from 5G cellular infrastructure to consumer electronics, automotive, and defense and security. Our high-power products, including RF switches, RF low-noise amplifiers, and RF power amplifiers, are essential for wireless infrastructure and high-power radios. We partner with leading semiconductor foundries and assembly houses to deliver products that offer premium quality and proven high reliability. Learn more about us at www.tagoretech.com.

Job Overview:

TagoreTech’s India team is looking for a motivated IC Layout Engineer. In this role, you will convert complex circuit designs into physical layouts, collaborating with circuit designers in Kolkata and the US to ensure performance, power, and area (PPA) goals are met while following design rules. You will also work on the PCB layout for application reference designs and product evaluation boards.

Job Type:

Full-Time

Work Location:

• Kolkata, (Salt Lake Sector V). India

Responsibilities:

Layout Design:

• Create accurate and efficient physical layouts of integrated circuits, including standard cells, macros, and full-chip designs.
• Utilize industry-standard layout tools (e.g., Cadence Virtuoso, ADS, MWO) to implement complex layout structures.
• Adhere to strict design rules, Tiling rules, and good RF layout practices Implement good substrate noise isolation practices for the triple well process
• Floor planning and Reticle layout planning

Physical Verification:

• Conduct thorough layout verification using various tools (e.g., DRC, LVS, PEX) to identify and resolve design rule violations and potential issues.
• Analyze layout parasitic effects and optimize the design to minimize performance degradation.

Collaboration:

• Work closely with circuit designers to understand design intent and resolve layout- related challenges.
• Collaborate with other engineering teams (e.g., process, test, and packaging) to ensure seamless integration of the chip into the overall system.

Documentation:

• Create clear and concise documentation of layout design, verification, and sign-off procedures.
• Maintain up-to-date design libraries and process design kits (PDKs).

Required Skills and Qualification:

• Strong understanding of semiconductor device physics and IC layout principles.
• Proficiency in industry-standard layout tools (e.g., Cadence Virtuoso, Synopsys Laker).
• Experience with physical verification tools (e.g., DRC, LVS, PEX).
• Knowledge of analog, digital, and mixed-signal circuit design.
• Strong problem-solving and analytical skills.
• Bachelor's or Master's degree in Electrical Engineering.

Preferred Qualifications:

• Experience with advanced layout techniques, such as hierarchical design, floor planning, and power distribution network design.
• Knowledge of scripting languages (e.g., Python, TCL) for automation and customization.
• Experience with statistical static timing analysis (SSTA).
• Familiarity with emerging technologies - 3D ICs and advanced packaging.

If you're excited about making a difference in the world of technology we encourage you to send your resume to Jobs_kol@tagoretech.com